Job Description

Responsibilities

1. Create ATE test program from scratch and integrate various test functions in a test flow to support first Silicon turn on for wafer and package in NPI phase.

2. Plan and drive all end-to-end engineering activities with Product & Test, Reliability and Foundry Tech teams of Product Engineering. Responsible in schematic development and debug of test interface hardware

3. Responsible in analyzing the volume data at FT and WS and provide 3.the spec to screen the device

4. Test patterns & Test flows Development, Debug & Test.

5. Characterization and debug of new silicon designs and process technologies in the study of Product Reliability.

6. High Temp Operating Life (HTOL) Testing as well as Performance/ Power for the lifetime of the product.

7. Responsible for Characterization and debug

Skills required .

• Hands on experience in Advantest 93K or Teradyne UFlex / ETS364
•  Experience in validation of Digital, Analog, Power management and Mixed signal products@ Wafer Sort & Final Test .
• Programming language - C/C++/VB . Proficient in handling the Smartest/IG-XL/Eagle vision tool .
• Familiarity with various testing techniques .
• Some Scan/ ATPG and Memory BIST test patterns development and debug experience will be an added advantage. .
• Independent, initiative and ability to overcome technical challenges .
• Good communication & some kind of project management skills including data presentation, leading and driving projects/ activities across different teams.